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RFP50N06
Typical Performance Curves Unless Otherwise Speci?ed
(Continued)
4000
60
10
3000
V GS = 0V, f = 1MHz
C ISS = C GS + C GD
C RSS = C GD
C OSS = C DS + C GD
45
V DD = BV DSS
V DD = BV DSS
7.5
C ISS
2000
30
0.75 BV DSS
0.75 BV DSS
5.0
1000
C OSS
15
0.50 BV DSS
0.25 BV DSS
R L = 1.2 ?
0.50 BV DSS
0.25 BV DSS
2.5
C RSS
I g(REF) = 1.45mA
V GS = 10V
0
0
5 10 15 20
V DS , DRAIN TO SOURCE VOLTAGE (V)
25
0
20
I g(REF)
I g(ACT)
t, TIME ( μ s)
80
I g(REF)
I g(ACT)
0
NOTE: Refer to Fairchild Application Notes AN7254 and AN7260.
FIGURE 12. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
FIGURE 13. NORMALIZED SWITCHING WAVEFORMS FOR
CONSTANT GATE CURRENT
Test Circuits and Waveforms
V DS
BV DSS
L
t P
V DS
VARY t P TO OBTAIN
REQUIRED PEAK I AS
R G
+
V DD
I AS
V DD
V GS
DUT
-
0V
t P
I AS
0.01 ?
0
t AV
FIGURE 14. UNCLAMPED ENERGY TEST CIRCUIT
FIGURE 15. UNCLAMPED ENERGY WAVEFORMS
t ON
t OFF
V DS
V DS
t d(ON)
90%
t r
t d(OFF)
t f
90%
V GS
R L
DUT
+
-
V DD
0
10%
90%
10%
R GS
V GS
50%
50%
V GS
FIGURE 16. SWITCHING TIME TEST CIRCUIT
?2002 Fairchild Semiconductor Corporation
0
10%
PULSE WIDTH
FIGURE 17. SWITCHING WAVEFORMS
RFP50N06 Rev. C0
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